IR21364(S&J)PbF
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Symbol
Definition
Min
Max
Units
V S
High side offset voltage
V B 1,2,3 - 25 V B 1,2,3 + 0.3
V B
High side floating supply voltage
-0.3
625
V HO
High side floating output voltage
V S1,2,3 - 0.3 V B 1,2,3 + 0.3
V CC
Low side and logic fixed supply voltage
-0.3
25
V SS
V LO1,2,3
Logic ground
Low side output voltage
V CC - 25
-0.3
V CC + 0.3
V CC + 0.3
V
lower of
V IN
Input voltage LIN, HIN, ITRIP, EN, RCIN
V SS -0.3
V CC + 0.3 or
Vss+15
V FLT
FAULT output voltage
V SS -0.3
V CC + 0.3
dV/dt
Allowable offset voltage slew rate
50
V/ns
P D
Rth JA
T J
T S
T L
Package power dissipation
@ T A ≤ +25 °C
Thermal resistance, junction to
ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
(28 lead SOIC)
(44 lead PLCC)
(28 lead SOIC)
(44 lead PLCC)
-55
1.6
2.0
78
63
150
150
300
W
°C/W
°C
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the
recommended conditions. All voltage parameters are absolute referenced to COM. The V S & V SS offset rating are
tested wit h all supplies biased at a 15 V differential.
Symbol
Definition
Min.
Max.
Units
V B1,2,3
V S 1,2,3
V CC
V HO 1,2,3
High side floating supply voltage
High side floating supply voltage
Low side supply voltage
High side output voltage
IR21364
IR21364
V S1,2,3 +11.5
Note 1
11.5
V S1,2,3
V S1,2,3 + 20
600
20
V B1,2,3
V LO1,2,3
V SS
V FLT
V RCIN
V ITRIP
Low side output voltage
Logic ground
FAULT output voltage
RCIN input voltage
ITRIP input voltage
0
-5
V SS
V SS
V SS
V CC
5
V CC
V CC
V SS + 5
V
V IN
Logic input voltage LIN, HIN, EN V SS
V SS + 5
T A
Ambient temperature
-40
125
°C
Note 1 : Logic operational for V S of COM -5 V to COM + 600 V. Logic state held for V S of COM -5 to COM – V BS.
(Please refer to the Design Tip DT97 -3 for more details).
www.irf.com
3
? 2009 International Rectifier
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